Design & Reuse
1004 IP
1001
0.0
Two Port Register File compiler - Memory optimized for high density and low power optimized - compiler range up to 40 k
Foundry sponsored - Two Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and low power optimized - compiler range up ...
1002
0.0
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/ Low-K process, Two Port Register File memory compiler....
1003
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
1004
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...